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MT8163 legacy fix, MT8168 fix, sla fix
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This commit is contained in:
parent
8d36ea4ef8
commit
279e364838
7 changed files with 10 additions and 6 deletions
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@ -521,6 +521,8 @@ class DALegacy(metaclass=LogBase):
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self.emmc = EmmcInfo(self.config, self.usbread(0x5C))
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self.emmc = EmmcInfo(self.config, self.usbread(0x5C))
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self.sdc = SdcInfo(self.config, self.usbread(0x1C))
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self.sdc = SdcInfo(self.config, self.usbread(0x1C))
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self.flashconfig = ConfigInfo(self.usbread(0x26))
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self.flashconfig = ConfigInfo(self.usbread(0x26))
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if self.config.hwcode == 0x8163:
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status=self.usbread(4)
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pi = PassInfo(self.usbread(0xA))
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pi = PassInfo(self.usbread(0xA))
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if pi.ack == 0x5A:
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if pi.ack == 0x5A:
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return True
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return True
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@ -351,7 +351,7 @@ class LegacyExt(metaclass=LogBase):
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else:
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else:
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self.info("SEJ Mode: No meid found. Are you in brom mode ?")
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self.info("SEJ Mode: No meid found. Are you in brom mode ?")
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if self.config.chipconfig.gcpu_base is not None:
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if self.config.chipconfig.gcpu_base is not None:
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if self.config.hwcode in [0x335, 0x8167, 0x8163, 0x8176]:
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if self.config.hwcode in [0x335, 0x8167, 0x8168, 0x8163, 0x8176]:
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self.info("Generating gcpu mtee2 key...")
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self.info("Generating gcpu mtee2 key...")
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mtee2 = hwc.aes_hwcrypt(btype="gcpu", mode="mtee")
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mtee2 = hwc.aes_hwcrypt(btype="gcpu", mode="mtee")
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if mtee2 is not None:
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if mtee2 is not None:
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@ -8,7 +8,7 @@ import sys
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from binascii import hexlify
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from binascii import hexlify
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from struct import pack, unpack
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from struct import pack, unpack
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from Cryptodome.Util.number import long_to_bytes
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from Cryptodome.Util.number import bytes_to_long, long_to_bytes
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from mtkclient.Library.Auth.sla import generate_da_sla_signature
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from mtkclient.Library.Auth.sla import generate_da_sla_signature
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from mtkclient.Library.DA.xflash.xflash_flash_param import NandExtension
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from mtkclient.Library.DA.xflash.xflash_flash_param import NandExtension
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@ -905,7 +905,7 @@ class XmlFlashExt(metaclass=LogBase):
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else:
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else:
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self.info("SEJ Mode: No meid found. Are you in brom mode ?")
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self.info("SEJ Mode: No meid found. Are you in brom mode ?")
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if self.config.chipconfig.gcpu_base is not None:
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if self.config.chipconfig.gcpu_base is not None:
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if self.config.hwcode in [0x335, 0x8167, 0x8163, 0x8176]:
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if self.config.hwcode in [0x335, 0x8167, 0x8168, 0x8163, 0x8176]:
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self.info("Generating gcpu mtee2 key...")
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self.info("Generating gcpu mtee2 key...")
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mtee2 = hwc.aes_hwcrypt(btype="gcpu", mode="mtee")
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mtee2 = hwc.aes_hwcrypt(btype="gcpu", mode="mtee")
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if mtee2 is not None:
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if mtee2 is not None:
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@ -798,7 +798,9 @@ class DAXML(metaclass=LogBase):
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return None
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return None
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def change_usb_speed(self):
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def change_usb_speed(self):
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return self.send_command(self.Cmd.cmd_can_higher_usb_speed())
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resp = self.send_command(self.Cmd.cmd_can_higher_usb_speed())
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if "Unsupported" in resp:
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return False
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def read_partition_table(self) -> tuple:
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def read_partition_table(self) -> tuple:
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self.send_command(self.Cmd.cmd_read_partition_table(), noack=True)
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self.send_command(self.Cmd.cmd_read_partition_table(), noack=True)
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@ -91,7 +91,7 @@ class HwCrypto(metaclass=LogBase):
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elif mode == "mtee":
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elif mode == "mtee":
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if self.hwcode in [0x321]:
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if self.hwcode in [0x321]:
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return self.gcpu.mtk_gcpu_mtee_6735()
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return self.gcpu.mtk_gcpu_mtee_6735()
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elif self.hwcode in [0x8167, 0x8163, 0x8176]:
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elif self.hwcode in [0x8168, 0x8167, 0x8163, 0x8176]:
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return self.gcpu.mtk_gcpu_mtee_8167()
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return self.gcpu.mtk_gcpu_mtee_8167()
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elif btype == "dxcc":
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elif btype == "dxcc":
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if mode == "fde":
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if mode == "fde":
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@ -266,7 +266,7 @@ class GCpu(metaclass=LogBase):
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self.reg.GCPU_REG_MSC = 0x80FF1800
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self.reg.GCPU_REG_MSC = 0x80FF1800
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self.reg.GCPU_AXI = 0x887F
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self.reg.GCPU_AXI = 0x887F
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self.reg.GCPU_UNK2 = 0
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self.reg.GCPU_UNK2 = 0
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elif self.hwcode == [0x8163, 0x8176]:
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elif self.hwcode == [0x8163, 0x8176, 0x8168]:
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self.write32(CLR_CLK_GATING_CTRL2, self.read32(CLR_CLK_GATING_CTRL2) | 0x8000000)
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self.write32(CLR_CLK_GATING_CTRL2, self.read32(CLR_CLK_GATING_CTRL2) | 0x8000000)
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self.reg.GCPU_REG_CTL &= 0xFFFFFFF0
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self.reg.GCPU_REG_CTL &= 0xFFFFFFF0
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self.reg.GCPU_REG_CTL |= 0xF
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self.reg.GCPU_REG_CTL |= 0xF
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