diff --git a/mtkclient/Library/DA/legacy/dalegacy_lib.py b/mtkclient/Library/DA/legacy/dalegacy_lib.py index 8e2a9a2..fbbb128 100755 --- a/mtkclient/Library/DA/legacy/dalegacy_lib.py +++ b/mtkclient/Library/DA/legacy/dalegacy_lib.py @@ -521,6 +521,8 @@ class DALegacy(metaclass=LogBase): self.emmc = EmmcInfo(self.config, self.usbread(0x5C)) self.sdc = SdcInfo(self.config, self.usbread(0x1C)) self.flashconfig = ConfigInfo(self.usbread(0x26)) + if self.config.hwcode == 0x8163: + status=self.usbread(4) pi = PassInfo(self.usbread(0xA)) if pi.ack == 0x5A: return True diff --git a/mtkclient/Library/DA/legacy/extension/legacy.py b/mtkclient/Library/DA/legacy/extension/legacy.py index d378073..254ecb4 100755 --- a/mtkclient/Library/DA/legacy/extension/legacy.py +++ b/mtkclient/Library/DA/legacy/extension/legacy.py @@ -351,7 +351,7 @@ class LegacyExt(metaclass=LogBase): else: self.info("SEJ Mode: No meid found. Are you in brom mode ?") if self.config.chipconfig.gcpu_base is not None: - if self.config.hwcode in [0x335, 0x8167, 0x8163, 0x8176]: + if self.config.hwcode in [0x335, 0x8167, 0x8168, 0x8163, 0x8176]: self.info("Generating gcpu mtee2 key...") mtee2 = hwc.aes_hwcrypt(btype="gcpu", mode="mtee") if mtee2 is not None: diff --git a/mtkclient/Library/DA/xflash/xflash_lib.py b/mtkclient/Library/DA/xflash/xflash_lib.py index b7a28b8..dccd2f8 100755 --- a/mtkclient/Library/DA/xflash/xflash_lib.py +++ b/mtkclient/Library/DA/xflash/xflash_lib.py @@ -8,7 +8,7 @@ import sys from binascii import hexlify from struct import pack, unpack -from Cryptodome.Util.number import long_to_bytes +from Cryptodome.Util.number import bytes_to_long, long_to_bytes from mtkclient.Library.Auth.sla import generate_da_sla_signature from mtkclient.Library.DA.xflash.xflash_flash_param import NandExtension diff --git a/mtkclient/Library/DA/xml/extension/v6.py b/mtkclient/Library/DA/xml/extension/v6.py index eb467fa..1424542 100755 --- a/mtkclient/Library/DA/xml/extension/v6.py +++ b/mtkclient/Library/DA/xml/extension/v6.py @@ -905,7 +905,7 @@ class XmlFlashExt(metaclass=LogBase): else: self.info("SEJ Mode: No meid found. Are you in brom mode ?") if self.config.chipconfig.gcpu_base is not None: - if self.config.hwcode in [0x335, 0x8167, 0x8163, 0x8176]: + if self.config.hwcode in [0x335, 0x8167, 0x8168, 0x8163, 0x8176]: self.info("Generating gcpu mtee2 key...") mtee2 = hwc.aes_hwcrypt(btype="gcpu", mode="mtee") if mtee2 is not None: diff --git a/mtkclient/Library/DA/xml/xml_lib.py b/mtkclient/Library/DA/xml/xml_lib.py index ad399aa..933e5c6 100755 --- a/mtkclient/Library/DA/xml/xml_lib.py +++ b/mtkclient/Library/DA/xml/xml_lib.py @@ -798,7 +798,9 @@ class DAXML(metaclass=LogBase): return None def change_usb_speed(self): - return self.send_command(self.Cmd.cmd_can_higher_usb_speed()) + resp = self.send_command(self.Cmd.cmd_can_higher_usb_speed()) + if "Unsupported" in resp: + return False def read_partition_table(self) -> tuple: self.send_command(self.Cmd.cmd_read_partition_table(), noack=True) diff --git a/mtkclient/Library/Hardware/hwcrypto.py b/mtkclient/Library/Hardware/hwcrypto.py index 241d47f..ebc9b6c 100755 --- a/mtkclient/Library/Hardware/hwcrypto.py +++ b/mtkclient/Library/Hardware/hwcrypto.py @@ -91,7 +91,7 @@ class HwCrypto(metaclass=LogBase): elif mode == "mtee": if self.hwcode in [0x321]: return self.gcpu.mtk_gcpu_mtee_6735() - elif self.hwcode in [0x8167, 0x8163, 0x8176]: + elif self.hwcode in [0x8168, 0x8167, 0x8163, 0x8176]: return self.gcpu.mtk_gcpu_mtee_8167() elif btype == "dxcc": if mode == "fde": diff --git a/mtkclient/Library/Hardware/hwcrypto_gcpu.py b/mtkclient/Library/Hardware/hwcrypto_gcpu.py index 39515da..1d9b99c 100755 --- a/mtkclient/Library/Hardware/hwcrypto_gcpu.py +++ b/mtkclient/Library/Hardware/hwcrypto_gcpu.py @@ -266,7 +266,7 @@ class GCpu(metaclass=LogBase): self.reg.GCPU_REG_MSC = 0x80FF1800 self.reg.GCPU_AXI = 0x887F self.reg.GCPU_UNK2 = 0 - elif self.hwcode == [0x8163, 0x8176]: + elif self.hwcode == [0x8163, 0x8176, 0x8168]: self.write32(CLR_CLK_GATING_CTRL2, self.read32(CLR_CLK_GATING_CTRL2) | 0x8000000) self.reg.GCPU_REG_CTL &= 0xFFFFFFF0 self.reg.GCPU_REG_CTL |= 0xF