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318 lines
8.9 KiB
C++
318 lines
8.9 KiB
C++
#include "platform_macro.h"
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#if defined(TARGET_ARCH_ARM64)
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#include "InstructionRelocation/arm64/ARM64InstructionRelocation.h"
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#include "dobby_internal.h"
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#include "core/arch/arm64/registers-arm64.h"
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#include "core/modules/assembler/assembler-arm64.h"
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#include "core/modules/codegen/codegen-arm64.h"
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using namespace zz::arm64;
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// Compare and branch.
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enum CompareBranchOp {
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CompareBranchFixed = 0x34000000,
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CompareBranchFixedMask = 0x7E000000,
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CompareBranchMask = 0xFF000000,
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};
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// Conditional branch.
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enum ConditionalBranchOp {
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ConditionalBranchFixed = 0x54000000,
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ConditionalBranchFixedMask = 0xFE000000,
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ConditionalBranchMask = 0xFF000010,
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};
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// Test and branch.
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enum TestBranchOp {
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TestBranchFixed = 0x36000000,
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TestBranchFixedMask = 0x7E000000,
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TestBranchMask = 0x7F000000,
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TBZ = TestBranchFixed | 0x00000000,
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TBNZ = TestBranchFixed | 0x01000000
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};
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static inline int64_t SignExtend(unsigned long x, int M, int N) {
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#if 0
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char sign_bit = bit(x, M - 1);
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unsigned long sign_mask = 0 - sign_bit;
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x |= ((sign_mask >> M) << M);
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#else
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x = (long)(x << (N - M)) >> (N - M);
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#endif
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return x;
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}
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#if 0
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static inline unsigned long set_bit(obj, st, unsigned long bit) {
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return (((~(1 << st)) & obj) | (bit << st));
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}
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static inline unsigned long set_bits(obj, st, fn, unsigned long bits) {
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return (((~(submask(fn - st) << st)) & obj) | (bits << st));
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}
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#endif
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static inline int64_t decode_imm14_offset(uint32_t instr) {
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int64_t offset;
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{
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int64_t imm19 = bits(instr, 5, 18);
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offset = (imm19 << 2);
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}
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offset = SignExtend(offset, 2 + 14, 64);
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return offset;
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}
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static inline int64_t decode_imm19_offset(uint32_t instr) {
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int64_t offset;
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{
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int64_t imm19 = bits(instr, 5, 23);
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offset = (imm19 << 2);
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}
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offset = SignExtend(offset, 2 + 19, 64);
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return offset;
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}
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static inline int64_t decode_imm26_offset(uint32_t instr) {
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int64_t offset;
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{
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int64_t imm26 = bits(instr, 0, 25);
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offset = (imm26 << 2);
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}
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offset = SignExtend(offset, 2 + 26, 64);
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return offset;
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}
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static inline int64_t decode_immhi_immlo_offset(uint32_t instr) {
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typedef uint32_t instr_t;
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struct {
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instr_t Rd : 5; // Destination register
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instr_t immhi : 19; // 19-bit upper immediate
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instr_t dummy_0 : 5; // Must be 10000 == 0x10
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instr_t immlo : 2; // 2-bit lower immediate
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instr_t op : 1; // 0 = ADR, 1 = ADRP
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} instr_decode;
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*(instr_t *)&instr_decode = instr;
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int64_t imm = instr_decode.immlo + (instr_decode.immhi << 2);
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imm = SignExtend(imm, 2 + 19, 64);
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return imm;
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}
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static inline int64_t decode_immhi_immlo_zero12_offset(uint32_t instr) {
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int64_t imm = decode_immhi_immlo_offset(instr);
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imm = imm << 12;
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return imm;
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}
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static inline int decode_rt(uint32_t instr) {
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return bits(instr, 0, 4);
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}
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static inline int decode_rd(uint32_t instr) {
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return bits(instr, 0, 4);
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}
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#if defined(DOBBY_DEBUG)
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#define debug_nop() _ nop()
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#else
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#define debug_nop()
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#endif
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void GenRelocateCodeAndBranch(void *buffer, AssemblyCodeChunk *origin, AssemblyCodeChunk *relocated) {
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TurboAssembler turbo_assembler_(0);
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#define _ turbo_assembler_.
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uint64_t curr_orig_pc = origin->raw_instruction_start();
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uint64_t curr_relo_pc = relocated->raw_instruction_start();
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addr_t buffer_cursor = (addr_t)buffer;
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arm64_inst_t instr = *(arm64_inst_t *)buffer_cursor;
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int predefined_relocate_size = origin->raw_instruction_size();
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while (buffer_cursor < ((addr_t)buffer + predefined_relocate_size)) {
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int last_relo_offset = turbo_assembler_.GetCodeBuffer()->getSize();
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if ((instr & LoadRegLiteralFixedMask) == LoadRegLiteralFixed) { // ldr x0, #16
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int rt = decode_rt(instr);
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char opc = bits(instr, 30, 31);
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addr64_t memory_address = decode_imm19_offset(instr) + curr_orig_pc;
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#define MEM(reg, offset) MemOperand(reg, offset)
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debug_nop(); // for debug
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{
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_ Mov(TMP_REG_0, memory_address); // should we replace with `Ldr` to set X17 ?
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if (opc == 0b00)
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_ ldr(W(rt), MEM(TMP_REG_0, 0));
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else if (opc == 0b01)
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_ ldr(X(rt), MEM(TMP_REG_0, 0));
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else {
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UNIMPLEMENTED();
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}
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}
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debug_nop();
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} else if ((instr & PCRelAddressingFixedMask) == PCRelAddressingFixed) {
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int rd = decode_rd(instr);
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int64_t imm = 0;
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addr64_t runtime_address = 0;
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if ((instr & PCRelAddressingMask) == ADR) {
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imm = decode_immhi_immlo_offset(instr);
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runtime_address = curr_orig_pc + imm;
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} else {
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imm = decode_immhi_immlo_zero12_offset(instr);
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runtime_address = ALIGN_FLOOR(curr_orig_pc, (1 << 12)) + imm;
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}
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/* output Mov */
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debug_nop();
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{
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_ Mov(X(rd), runtime_address); // should we replace with `Ldr` to set X17 ?
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}
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debug_nop();
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} else if ((instr & UnconditionalBranchFixedMask) == UnconditionalBranchFixed) { // b xxx
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addr_t branch_address = decode_imm26_offset(instr) + curr_orig_pc;
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RelocLabelEntry *branchAddressLabel = new RelocLabelEntry(branch_address);
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_ AppendRelocLabelEntry(branchAddressLabel);
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debug_nop();
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{
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_ Ldr(TMP_REG_0, branchAddressLabel); // should we replace with `Mov` to set X17 ?
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if ((instr & UnconditionalBranchMask) == BL) {
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_ blr(TMP_REG_0);
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} else {
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_ br(TMP_REG_0);
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}
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}
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debug_nop();
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} else if ((instr & TestBranchFixedMask) == TestBranchFixed) { // tbz, tbnz
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addr64_t branch_address = decode_imm14_offset(instr) + curr_orig_pc;
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RelocLabelEntry *branchAddressLabel = new RelocLabelEntry(branch_address);
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_ AppendRelocLabelEntry(branchAddressLabel);
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arm64_inst_t branch_instr = instr;
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char op = bit(instr, 24);
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op = op ^ 1;
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set_bit(branch_instr, 24, op);
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int64_t offset = 4 * 3; // branch_instr; ldr x17, #label; br x17
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uint32_t imm14 = offset >> 2;
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set_bits(branch_instr, 5, 18, imm14);
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debug_nop();
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{
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_ Emit(branch_instr);
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{
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_ Ldr(TMP_REG_0, branchAddressLabel); // should we replace with `Mov` to set X17 ?
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_ br(TMP_REG_0);
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}
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}
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debug_nop();
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} else if ((instr & CompareBranchFixedMask) == CompareBranchFixed) { // cbz cbnz
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addr64_t branch_address = decode_imm19_offset(instr) + curr_orig_pc;
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arm64_inst_t branch_instr = instr;
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char op = bit(instr, 24);
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op = op ^ 1;
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set_bit(branch_instr, 24, op);
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int64_t offset = 4 * 3;
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uint32_t imm19 = offset >> 2;
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set_bits(branch_instr, 5, 23, imm19);
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RelocLabelEntry *branchAddressLabel = new RelocLabelEntry(branch_address);
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_ AppendRelocLabelEntry(branchAddressLabel);
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debug_nop();
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{
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_ Emit(branch_instr);
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{
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_ Ldr(TMP_REG_0, branchAddressLabel); // should we replace with `Mov` to set X17 ?
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_ br(TMP_REG_0);
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}
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}
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debug_nop();
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} else if ((instr & ConditionalBranchFixedMask) == ConditionalBranchFixed) { // b.cond
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addr64_t branch_address = decode_imm19_offset(instr) + curr_orig_pc;
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arm64_inst_t branch_instr = instr;
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char cond = bits(instr, 0, 3);
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cond = cond ^ 1;
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set_bits(branch_instr, 0, 3, cond);
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int64_t offset = 4 * 3;
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uint32_t imm19 = offset >> 2;
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set_bits(branch_instr, 5, 23, imm19);
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RelocLabelEntry *branchAddressLabel = new RelocLabelEntry(branch_address);
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_ AppendRelocLabelEntry(branchAddressLabel);
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debug_nop();
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{
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_ Emit(branch_instr);
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{
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_ Ldr(TMP_REG_0, branchAddressLabel); // should we replace with `Mov` to set X17 ?
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_ br(TMP_REG_0);
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}
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}
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debug_nop();
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} else {
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// origin write the instruction bytes
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_ Emit(instr);
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}
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// Move to next instruction
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curr_orig_pc += 4;
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buffer_cursor += 4;
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#if 0
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{
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// 1 orignal instrution => ? relocated instruction
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int relo_offset = turbo_assembler_.GetCodeBuffer()->getSize();
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int relo_len = relo_offset - last_relo_offset;
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curr_relo_pc += relo_len;
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}
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#endif
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curr_relo_pc = relocated->raw_instruction_start() + turbo_assembler_.pc_offset();
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instr = *(arm64_inst_t *)buffer_cursor;
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}
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#if 0
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// check branch in relocate-code range
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{
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for (size_t i = 0; i < data_labels->getCount(); i++) {
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RelocLabelEntry *pseudoLabel = (RelocLabelEntry *)data_labels->getObject(i);
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if (pseudoLabel->address == curr_orig_pc) {
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FATAL("label(%p) in relo code %p, please enable b-xxx branch plugin.", pseudoLabel->address, curr_orig_pc);
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}
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}
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}
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#endif
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// TODO: if last instr is unlink branch, skip
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// Branch to the rest of instructions
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CodeGen codegen(&turbo_assembler_);
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codegen.LiteralLdrBranch(curr_orig_pc);
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_ RelocBind();
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// Generate executable code
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{
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AssemblyCodeChunk *code = NULL;
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code = AssemblyCodeBuilder::FinalizeFromTurboAssembler(&turbo_assembler_);
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relocated->re_init_region_range(code->raw_instruction_start(), code->raw_instruction_size());
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delete code;
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}
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}
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#endif
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