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More effective match strategies (#804)
* More effective match strategies * Basic check on instruction relocation * More targeted check for relocation
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parent
540bcc61ad
commit
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2 changed files with 213 additions and 18 deletions
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@ -1,6 +1,9 @@
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from difflib import SequenceMatcher
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from typing import List
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import re
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from typing import List, Tuple, Set
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DiffOpcode = Tuple[str, int, int, int, int]
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REG_FIND = re.compile(r"(?: |\[)(e?[a-d]x|e?[s,d]i|[a-d][l,h]|e?[b,s]p)")
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ALLOWED_JUMP_SWAPS = (
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("ja", "jb"),
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@ -69,8 +72,8 @@ def patch_jump(a: str, b: str) -> str:
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def patch_cmp_swaps(
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sm: SequenceMatcher, orig_asm: List[str], recomp_asm: List[str]
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) -> bool:
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codes: List[DiffOpcode], orig_asm: List[str], recomp_asm: List[str]
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) -> Set[int]:
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"""Can we resolve the diffs between orig and recomp by patching
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swapped cmp instructions?
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For example:
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@ -81,12 +84,7 @@ def patch_cmp_swaps(
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ja .label jb .label
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"""
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# Copy the instructions so we can patch
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# TODO: If we change our strategy to allow multiple rounds of patching,
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# we should modify the recomp array directly.
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new_asm = recomp_asm[::]
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codes = sm.get_opcodes()
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fixed_lines = set()
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for code, i1, i2, j1, j2 in codes:
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# To save us the trouble of finding "compatible" cmp instructions
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@ -98,9 +96,207 @@ def patch_cmp_swaps(
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for i, j in zip(range(i1, i2), range(j1, j2)):
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if can_cmp_swap(orig_asm[i : i + 2], recomp_asm[j : j + 2]):
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# Patch cmp
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new_asm[j] = orig_asm[i]
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fixed_lines.add(j)
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# Patch the jump if necessary
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new_asm[j + 1] = patch_jump(orig_asm[i + 1], recomp_asm[j + 1])
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patched = patch_jump(orig_asm[i + 1], recomp_asm[j + 1])
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# We only register a fix if it actually matches
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if orig_asm[i + 1] == patched:
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fixed_lines.add(j + 1)
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return orig_asm == new_asm
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return fixed_lines
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def effective_match_possible(orig_asm: List[str], recomp_asm: List[str]) -> bool:
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# We can only declare an effective match based on the text
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# so you need the same amount of "stuff" in each
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if len(orig_asm) != len(recomp_asm):
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return False
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# mnemonic_orig = [inst.partition(" ")[0] for inst in orig_asm]
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# mnemonic_recomp = [inst.partition(" ")[0] for inst in recomp_asm]
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# Cannot change mnemonics. Must be same starting list
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# TODO: Fine idea but this will exclude jump swaps for cmp operand order
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# if sorted(mnemonic_orig) != sorted(mnemonic_recomp):
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# return False
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return True
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def find_regs_used(inst: str) -> List[str]:
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return REG_FIND.findall(inst)
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def find_regs_changed(a: str, b: str) -> List[Tuple[str, str]]:
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"""For instructions a, b, return the pairs of registers that were used.
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This is not a very precise way to compare the instructions, so it depends
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on the input being two instructions that would match *except* for
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the register choice."""
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return zip(REG_FIND.findall(a), REG_FIND.findall(b))
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def bad_register_swaps(
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swaps: Set[int], orig_asm: List[str], recomp_asm: List[str]
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) -> Set[int]:
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"""The list of recomp indices in `swaps` tells which instructions are
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a match for orig except for the registers used. From that list, check
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whether a register swap should not be allowed.
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For now, this means checking for `push` instructions where the register
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was not used in any other register swaps on previous instructions."""
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rejects = set()
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# Foreach `push` instruction where we have excused the diff
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pushes = [j for j in swaps if recomp_asm[j].startswith("push")]
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for j in pushes:
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okay = False
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# Get the operands in each
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reg = (orig_asm[j].partition(" ")[2], recomp_asm[j].partition(" ")[2])
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# If this isn't a register at all, ignore it
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try:
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int(reg[0], 16)
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continue
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except ValueError:
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pass
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# For every other excused diff that is *not* a push:
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# Assumes same index in orig as in recomp, but so does our naive match
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for k in swaps.difference(pushes):
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changed_regs = find_regs_changed(orig_asm[k], recomp_asm[k])
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if reg in changed_regs or reg[::-1] in changed_regs:
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okay = True
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break
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if not okay:
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rejects.add(j)
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return rejects
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# Instructions that result in a change to the first operand
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MODIFIER_INSTRUCTIONS = ("adc", "add", "lea", "mov", "neg", "sbb", "sub", "pop", "xor")
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def instruction_alters_regs(inst: str, regs: Set[str]) -> bool:
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(mnemonic, _, op_str) = inst.partition(" ")
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(first_operand, _, __) = op_str.partition(", ")
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return (mnemonic in MODIFIER_INSTRUCTIONS and first_operand in regs) or (
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mnemonic == "call" and "eax" in regs
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)
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def relocate_instructions(
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codes: List[DiffOpcode], orig_asm: List[str], recomp_asm: List[str]
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) -> Set[int]:
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"""Collect the list of instructions deleted from orig and inserted
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into recomp, according to the diff opcodes. Using this list, match up
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any pairs of instructions that we assume to be relocated and return
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the indices in recomp where this has occurred.
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For now, we are checking only for an exact match on the instruction.
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We are not checking whether the given instruction can be moved from
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point A to B. (i.e. does this set a register that is used by the
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instructions between A and B?)"""
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deletes = {
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i for code, i1, i2, _, __ in codes for i in range(i1, i2) if code == "delete"
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}
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inserts = [
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j for code, _, __, j1, j2 in codes for j in range(j1, j2) if code == "insert"
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]
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relocated = set()
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for j in inserts:
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line = recomp_asm[j]
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recomp_regs_used = set(find_regs_used(line))
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for i in deletes:
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# Check for exact match.
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# TODO: This will grab the first instruction that matches.
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# We should probably use the nearest index instead, if it matters
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if orig_asm[i] == line:
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# To account for a move in either direction
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reloc_start = min(i, j)
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reloc_end = max(i, j)
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if not any(
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instruction_alters_regs(orig_asm[k], recomp_regs_used)
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for k in range(reloc_start, reloc_end)
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):
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relocated.add(j)
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deletes.remove(i)
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break
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return relocated
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DWORD_REGS = ("eax", "ebx", "ecx", "edx", "esi", "edi", "ebp", "esp")
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WORD_REGS = ("ax", "bx", "cx", "dx", "si", "di", "bp", "sp")
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BYTE_REGS = ("ah", "al", "bh", "bl", "ch", "cl", "dh", "dl")
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def naive_register_replacement(orig_asm: List[str], recomp_asm: List[str]) -> Set[int]:
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"""Replace all registers of the same size with a placeholder string.
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After doing that, compare orig and recomp again.
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Return indices from recomp that are now equal to the same index in orig.
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This requires orig and recomp to have the same number of instructions,
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but this is already a requirement for effective match."""
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orig_raw = "\n".join(orig_asm)
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recomp_raw = "\n".join(recomp_asm)
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# TODO: hardly the most elegant way to do this.
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for rdw in DWORD_REGS:
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orig_raw = orig_raw.replace(rdw, "~reg4")
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recomp_raw = recomp_raw.replace(rdw, "~reg4")
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for rw in WORD_REGS:
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orig_raw = orig_raw.replace(rw, "~reg2")
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recomp_raw = recomp_raw.replace(rw, "~reg2")
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for rb in BYTE_REGS:
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orig_raw = orig_raw.replace(rb, "~reg1")
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recomp_raw = recomp_raw.replace(rb, "~reg1")
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orig_scrubbed = orig_raw.split("\n")
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recomp_scrubbed = recomp_raw.split("\n")
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return {
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j for j in range(len(recomp_scrubbed)) if orig_scrubbed[j] == recomp_scrubbed[j]
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}
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def find_effective_match(
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codes: List[DiffOpcode], orig_asm: List[str], recomp_asm: List[str]
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) -> bool:
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"""Check whether the two sequences of instructions are an effective match.
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Meaning: do they differ only by instruction order or register selection?"""
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if not effective_match_possible(orig_asm, recomp_asm):
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return False
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already_equal = {
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j for code, _, __, j1, j2 in codes for j in range(j1, j2) if code == "equal"
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}
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# We need to come up with some answer for each of these lines
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recomp_lines_disputed = {
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j
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for code, _, __, j1, j2 in codes
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for j in range(j1, j2)
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if code in ("insert", "replace")
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}
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cmp_swaps = patch_cmp_swaps(codes, orig_asm, recomp_asm)
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# This naive result includes lines that already match, so remove those
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naive_swaps = naive_register_replacement(orig_asm, recomp_asm).difference(
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already_equal
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)
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relocates = relocate_instructions(codes, orig_asm, recomp_asm)
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bad_swaps = bad_register_swaps(naive_swaps, orig_asm, recomp_asm)
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corrections = set().union(
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naive_swaps.difference(bad_swaps),
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cmp_swaps,
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relocates,
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)
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return corrections.issuperset(recomp_lines_disputed)
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@ -10,8 +10,8 @@
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from isledecomp.parser import DecompCodebase
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from isledecomp.dir import walk_source_dir
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from isledecomp.types import SymbolType
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from isledecomp.compare.asm import ParseAsm, can_resolve_register_differences
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from isledecomp.compare.asm.fixes import patch_cmp_swaps
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from isledecomp.compare.asm import ParseAsm
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from isledecomp.compare.asm.fixes import find_effective_match
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from .db import CompareDb, MatchInfo
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from .diff import combined_diff
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from .lines import LinesDb
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if ratio != 1.0:
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# Check whether we can resolve register swaps which are actually
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# perfect matches modulo compiler entropy.
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is_effective_match = patch_cmp_swaps(
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diff, orig_asm, recomp_asm
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) or can_resolve_register_differences(orig_asm, recomp_asm)
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codes = diff.get_opcodes()
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is_effective_match = find_effective_match(codes, orig_asm, recomp_asm)
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unified_diff = combined_diff(
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diff, orig_combined, recomp_combined, context_size=10
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)
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